T6 is a highly integrated, hyper-virtualized 1/10/25/40/50/100 GbE controller with full offload support of a complete Unified Wire solution. T6 provides no-compromise performance with both low latency (sub 1µsec through hardware) and high bandwidth, limited only by the PCI bus. Furthermore, it scales to true 100 Gigabit line rate operation from a single TCP connection to thousands of connections, and allows simultaneous low latency and high bandwidth operation thanks to multiple physical channels through the ASIC.
Designed for high performance clustering, storage, cloud, and data networking, T6 enables fabric consolidation by simultaneously supporting TCP/IP and UDP/IP socket applications, RDMA applications and SCSI applications at wire speed, over legacy switching infrastructure, thereby allowing InfiniBand and FibreChannel applications to run unmodified and concurrently over standard Ethernet. This will result in tremendous savings in the data center by avoiding the need for InfiniBand or FibreChannel adapters, cabling, switches and gateways. Thanks to the reliability provided by hardware offloaded TCP/IP, the benefits of T6 RDMA include eliminating the scalability and cabling and noise issues associated with IB-FDR.
T6 establishes a new milestone for SAN performance. With T6, true 100Gb SAN throughput, more than 3x the latest FC speeds, is now enabled via offloaded iSCSI without requiring for specialized FCoE switches. T6 further improves storage IO performance to more than 5M IOPs. With a specific design focus on low latency and small packet processing performance, T6 also enables a new performance milestone for high frequency trading and other latency sensitive applications such as flash based storage installations.
Support for integrated TLS/SSL/IPsec and SMB 3.X crypto allows for tremendous differentiation for the end product. For example, T6 can encrypt/decrypt network data at line rate and in an in-line fashion, while concurrently doing encryption/decryption of storage data in a co-processor mode, thus enabling concurrent secure communication and secure storage, all for the price and power of a typical NIC.
Chelsio T6 ASIC Architecture
The T6 ASIC is built around a highly scalable and programmable protocol-processing engine. Much of the processing of the offloaded protocols is implemented in firmware running on a proprietary pipelined data-flow processor. The pipeline supports cut-through operation for both transmit and receive paths for minimum latency, and the transport processor is designed for wire-speed operation at small packet sizes, regardless of the number of connections. Some key features of T6:
- PCI Express v3.0 x16 host interface
- Optional DDR-3/4 memory interface for high capacity applications
- 2×1/10/25/40/50/100GbE ports
- Designed for very low latency, high bandwidth and high packet processing rate
- TOE/iWARP RDMA/iSCSI/FCoE port to port, and adapter to adapter failover
- SR-IOV 8PF/256VF + VEPA/VEB 802.1Qbg/h offload virtualization
- Integrated OpenFlow ready virtual Ethernet switch (OVS Offload)
- T10-DIF/DIX protection support for both FCoE and iSCSI
- Key Offloads:
- TCP/UDP
- iSCSI/FCoE/iSER
- iWARP RDMA
- SDN (OVS, NVGRE, VXLAN, GENEVE, etc.)
- Crypto (TLS/SSL, IPsec, SMB 3.X)
- Other (Time Stamping, Tracing)
- Classification/Filtering
- Traffic Management/QoS/Congestion control
- Hardware based IO virtualization
Some key software support of T6:
- Windows Server 2012-R2, 2016
- SMB-Direct
- Storage Replica
- Storage Spaces Direct
- Azure Stack
- Network Direct
- iSCSI Offload Initiator
- Windows 10 Client RDMA
- Lustre-RDMA
- NFS-RDMA
- Hadoop-RDMA
- iSCSI: Open-iSCSI, LIO Target, SCST, FreeBSD and Linux support
- VMware ESX-iSCSI Initiator
- NVMe-Fabrics support
- nVidia’s GPU Direct
- OpenPower support
- ARM support
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